Commit Graph
426 Commits
Author SHA1 Message Date
leejetandMaxime Dréan fc350be2ce feat(server): report generation stages independently of previews (#2303)
Co-authored-by: Maxime Dréan <maximedrean@proton.me>
2026-11-09 02:32:27 +08:00
leejet b43ce4badd fix: preserve Krea2 text-fusion names in Kohya LoRAs (#2301) 2026-11-09 02:11:28 +08:00
leejet cd5594e9f9 feat: add SeedVR2 image and video upscaling (#2300) 2026-11-09 01:13:57 +08:00
leejetandVideo Rebirth 80c4707c53 feat: support HyperFlow H3 Flash (#2299)
Co-authored-by: Video Rebirth <opensource@videorebirth.com>
2026-11-09 00:43:02 +08:00
leejet 3d315c47d4 feat: add Metal INT8 ConvRot support (#2297) 2026-11-08 22:28:35 +08:00
DrMkdaddy b43af40461 fix: use patch token count for the Flux scheduler (#2293) 2026-11-08 21:37:06 +08:00
leejet 0b3b98d7b8 fix: avoid CPU fallback based on backend allocation chunk size (#2294) 2026-11-08 16:24:53 +08:00
leejet de00bafc3d feat: add configurable attention chunk budget for MiniMax-H3 (#2292) 2026-11-08 15:50:25 +08:00
Zihao 7bcd4ce8ce fix: clean LoRA multiplier and prompt spacing in image metadata (#2283) 2026-11-08 15:23:11 +08:00
leejet 5f8c19f98d perf: reduce fused compute buffers (#2290) 2026-11-08 12:28:44 +08:00
leejet 9234ad822a feat: add RelayVSR video upscaling with CUDA window attention (#2285) 2026-11-08 00:09:48 +08:00
leejet b1f5a51a1e fix: chunk MiniMax-H3 QKV projections within backend buffer limits (#2286) 2026-11-08 00:04:37 +08:00
Daniele fdfc913c51 feat: ControlNet Union support for SDXL (#2284) 2026-11-07 23:33:41 +08:00
leejet 5a1ba5d895 perf(vulkan): accelerate packed INT4 with cooperative matrices (#2280) 2026-11-07 00:58:26 +08:00
leejet f5df5f8b84 perf: accelerate packed INT4 CUDA inference with CUTLASS (#2278) 2026-11-06 01:59:05 +08:00
leejetandnoctrex 7952693004 feat: support packed INT4 convrot models (#2276)
Co-authored-by: noctrex <noctrex@gmail.com>
2026-11-06 00:35:58 +08:00
leejetandmirek190 58bb3c1b1c perf(vulkan): accelerate MOSS normalization and SiTU staging (#2273)
Co-authored-by: mirek190 <mirek190@gmail.com>
2026-11-05 03:01:31 +08:00
farawayso d1358945dc feat: MiniMax-H3 latent hires second pass (#2249) 2026-11-05 02:59:04 +08:00
leejet 3e92bf990a feat: add P-H3-Image generation and editing support (#2272) 2026-11-04 23:24:51 +08:00
leejetandmirek190 984eb0686c perf(cuda): fuse MOSS modulation and direct RoPE F16 output (#2269)
Co-authored-by: mirek190 <mirek190@gmail.com>
2026-11-04 02:01:41 +08:00
leejet d30854463d perf: fuse Z-Image GPU operations and optimize BF16 GEMM (#2265) 2026-11-03 23:59:21 +08:00
Piotr Wilkin (ilintar) 6225bf8c88 perf: view qkv slices for moss instead of slice+reshape (#2232) 2026-11-03 23:46:35 +08:00
Mirek f8ea2e162c perf: use native SiTU for MOSS with composite fallback (#2210) 2026-11-03 23:41:09 +08:00
leejet b4d6b83af6 fix: support integer LoRA scalar conversion to FP32 (#2263) 2026-11-03 00:07:40 +08:00
cumal 250ea6e385 fix: layer split across cuda (#2262) 2026-11-03 00:03:43 +08:00
leejet 290148d2e3 feat: add custom modulate operator and ConvRot fusion (#2258) 2026-11-02 01:19:28 +08:00
leejet 133087deb8 fix: prefer discrete GPUs in auto-fit device selection (#2259) 2026-11-02 01:09:36 +08:00
leejet 62c54439c8 fix: include missing cassert headers in SageAttention CUDA code 2026-11-02 00:17:49 +08:00
leejet fe2682ba16 fix: retry Vulkan capacity checks after memory reclamation (#2256) 2026-11-01 22:55:56 +08:00
leejet 5356982584 fix: chunk MiniMax-H3 MLP to respect backend buffer limits (#2257) 2026-11-01 22:08:29 +08:00
leejet 45a63ac460 refactor: move model-specific operators and fusions into backend extensions (#2253) 2026-11-01 21:18:37 +08:00
leejet 0a067120b3 perf: optimize Vulkan kernels, graph fusion, and workspace reuse (#2251) 2026-10-31 14:55:58 +08:00
leejet e239e4b0fd refactor: replace manual gated activations with native ggml GLU (#2250) 2026-10-30 01:32:46 +08:00
leejet 37bc88b5e9 perf: optimize H3 inference and segmented weight prefetch (#2240) 2026-10-30 00:38:14 +08:00
dubs-dev e7b7ec6d6f fix: detect SDXL when the UNet is loaded standalone from diffusers tensor names (#2247) 2026-10-29 23:33:44 +08:00
vmobilis 997478a4cb refactor: make_hires_sigma_schedule() simplification (#2244) 2026-10-29 23:21:20 +08:00
Daniele 8ee08e3cb9 perf: use fused ggml_geglu_swapped for GEGLU (#2245) 2026-10-29 23:18:10 +08:00
leejet 77b72a2efe perf: accelerate INT8 diffusion inference with CUDA fusions (#2235) 2026-10-28 22:02:46 +08:00
Wagner Bruna 8cbe905fdd refactor: use a distinct version id for Chroma (#2237) 2026-10-28 22:02:18 +08:00
project516 9bfc4d1089 fix: honor the requested hires sampling step count (#2227) 2026-10-28 01:33:03 +08:00
project516 2032526e8c fix: include integrated GPUs in automatic memory planning (#2228) 2026-10-28 01:28:11 +08:00
leejet be486498ea fix: enable segmented execution for FLUX.3 (#2224) 2026-10-27 00:32:18 +08:00
leejet bb6b128b2d fix: avoid repeated seeks when skipping small GGUF metadata values (#2223) 2026-10-27 00:24:43 +08:00
leejet e41fbcf455 feat(server): add recipe constraints and update generation workspace (#2217) 2026-10-26 01:01:43 +08:00
leejet bb6a0ccfa3 feat: support FLUX.3 Diffusers LoRA tensor names (#2214) 2026-10-25 16:55:45 +08:00
Mirekandleejet e6370bf093 perf: avoid redundant MOSS QKV and value layout copies (#2209)
Co-authored-by: leejet <leejet714@gmail.com>
2026-10-25 16:54:51 +08:00
Mirek 2a5f81095d perf: reuse shared modulation slices for moss image (#2208) 2026-10-25 16:00:26 +08:00
Wagner Bruna d234ac62fa feat: print sigma values before inference (#2205) 2026-10-25 15:58:35 +08:00
Wagner Bruna 0886f11b6b fix: skip reference image VAE encoding when latents have no consumer (#2207) 2026-10-25 05:19:32 +08:00
leejet ea209dbfcf perf: cache CPU position embeddings across DiT runners (#2211) 2026-10-25 05:18:30 +08:00