 leejet
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ddc367ab5d
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refactor: unify runner execution and weight residency (#2321)
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2026-11-10 23:45:01 +08:00 |
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leejet
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a3c49b13be
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refactor: unify ggml operation helpers around runner context (#2314)
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2026-11-10 01:58:04 +08:00 |
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leejetandnoctrex
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7952693004
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feat: support packed INT4 convrot models (#2276)
Co-authored-by: noctrex <noctrex@gmail.com>
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2026-11-06 00:35:58 +08:00 |
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leejet
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77b72a2efe
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perf: accelerate INT8 diffusion inference with CUDA fusions (#2235)
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2026-10-28 22:02:46 +08:00 |
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leejet
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ea209dbfcf
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perf: cache CPU position embeddings across DiT runners (#2211)
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2026-10-25 05:18:30 +08:00 |
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leejet
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e0ed724e28
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chore: format code
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2026-10-24 01:23:42 +08:00 |
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leejet
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228c707fde
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perf: use ggml rope apply op on supported backends (#2113)
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2026-10-09 04:32:36 +08:00 |
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leejet
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740c7ae193
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feat: add configurable Qwen cache types and early cache scheduling (#2045)
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2026-09-25 01:51:01 +08:00 |
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leejet
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88411ef1e0
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refactor: centralize circular RoPE and extend image model support (#2039)
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2026-09-24 01:45:14 +08:00 |
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assouan
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36746936c0
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fix: add graph cuts for MiniMax-H3 text conditioning (#1900)
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2026-09-24 00:03:29 +08:00 |
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leejet
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2dc7f5408a
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feat: add Qwen Image 2.1 prefix KV cache (#2035)
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2026-09-23 23:08:21 +08:00 |
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leejet
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b56c68617d
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fix: avoid narrowing conversion in SigVQ patch embedding and format code
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2026-09-21 01:27:31 +08:00 |
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leejet
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137f7409bb
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feat: add Qwen Image 2.1 support (#1994)
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2026-09-20 22:51:21 +08:00 |
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